RF2-Bit Parallel to Serial Conversion VHDL Code
VHDL code for a 2-bit parallel to serial converter implementation. Includes code, architecture, and port descriptions.
Posts tagged: Digital Design
Showing 19 posts (Page 1 of 1)
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2-to-4 Decoder Design in LabVIEW
Learn how to design a 2-to-4 decoder using LabVIEW. This article provides the VI block diagram, front panel, and download link for the source code.
32-bit ALU Verilog Code Implementation
Verilog source code for a 32-bit Arithmetic Logic Unit (ALU) capable of performing arithmetic and logical operations. Includes truth table and simulation results.
4-Bit Braun Multiplier VHDL Code
VHDL source code implementation of a 4-bit Braun multiplier, commonly used in digital signal processing and computer arithmetic.
4-Bit Down Counter Verilog Code and Test Bench
Verilog code for a 4-bit down counter is presented, along with its corresponding test bench for simulation and verification.
4-Bit Up/Down Counter VHDL Source Code
VHDL source code for a 4-bit up/down counter with reset, load, and direction control.
7-Segment Display Interface VHDL Source Code
VHDL code for interfacing with a 7-segment display, including entity declaration and architecture implementation.
Asynchronous FIFO Verilog Code and Test Bench
Verilog code implementation of an Asynchronous FIFO, including a test bench and simulation output analysis.
BCD Up/Down Counter VHDL Source Code
VHDL code examples for BCD up and down counters, including complete, synthesizable code blocks.
D Flip-Flop Implementation Without Reset: Verilog Code and Simulation
Explore a D flip-flop implementation without reset, including Verilog code, test bench, simulation results, and RTL schematic.
D Flip-Flop with Synchronous Reset: Verilog Implementation
Explore the Verilog code, test bench, simulation, and RTL schematic of a D flip-flop with synchronous reset.
DC Motor Control with FPGA: VHDL Source Code
VHDL code for interfacing a DC motor with an FPGA, including clock division and motor direction control. Pin assignments for XC2S100TQ144-5 included.
Different Types of FPGAs: A Comprehensive Guide
Explore various FPGA types based on architecture, configuration memory, features, capacity, application, and packaging. Understand their advantages and disadvantages for selecting the right FPGA.
Interleaver and Deinterleaver VHDL Source Code
VHDL source code for an interleaver/deinterleaver, based on corresponding MATLAB code. Includes links to other useful VHDL code examples.
Scrambler and Descrambler VHDL Code
VHDL source code for a scrambler and descrambler implementation, based on MATLAB scrambler code.
Verilog HDL Code for All Logic Gates
Verilog code implementing AND, OR, NOT, NAND, NOR, and XOR gates. Includes simulation and verification steps.
VHDL Code for Basic Logic Gates
VHDL source code implementation of basic logic gates, including AND, OR, NOT, NAND, NOR, XOR, and XNOR.
VHDL Code for Ramp Wave Generation Using DAC
This article provides VHDL code for generating a ramp wave using a Digital-to-Analog Converter (DAC).
VHDL Code for Square Wave Generation using DAC
This article details VHDL code for generating a square wave using a Digital-to-Analog Converter (DAC), explaining the key components and processes involved.
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