RF8051 Instruction Set: Opcode, Operand, Size, and M-Cycle
8051
instruction set
microcontroller
opcode
machine cycle
This page covers the 8051 instruction set, detailing the opcode, operand, size in bytes, and M-cycle (number of machine cycles) for each instruction. Remember that one machine cycle consists of 12 oscillator periods.
Table 1 explains the terms used in the instruction tables, along with their addressing modes.
Table 1: Instruction Terminology
| Instructions | Description |
|---|---|
| Rn | Register R7 to R0. |
| direct | 8-bit address of the internal data location. |
| @Ri | 8-bit address of internal RAM indicated by register R1 or R0. |
| #data | 8-bit constant included in the instruction. |
| #data16 | 16-bit constant included in the instruction. |
| addr16 | 16-bit destination address. |
| addr11 | 11-bit destination address. |
| rel | Signed (2’s complement) 8-bit offset byte. |
| bit | Direct addressed bit in internal data RAM or SFR (Special Function Register). |
8051 Instruction Set Categories
The 8051 instruction set is divided into the following categories:
- Arithmetic instructions
- Logical instructions
- Data transfer instructions
- Boolean instructions
- Branching instructions
Arithmetic Instructions
| Instruction | Opcode | Operand | Size (Bytes) | Machine Cycles | Description |
|---|---|---|---|---|---|
| ADD A,Rn | 1 | 1 | Add register to accumulator | ||
| ADDC A,Rn | 1 | 1 | Add register to accumulator with carry | ||
| SUBB A,Rn | 1 | 1 | Subtract register from ACC with borrow | ||
| INC A | 1 | 1 | Increment accumulator | ||
| DEC A | 1 | 1 | Decrement accumulator | ||
| INC DPTR | 1 | 2 | Increment data pointer | ||
| MUL AB | 1 | 4 | Multiply A and B (48 Oscillator periods) | ||
| DIV AB | 1 | 4 | Divide A by B (Oscillator periods) |
Logical Instructions
| Instruction | Opcode | Operand | Size (Bytes) | Machine Cycles | Description |
|---|---|---|---|---|---|
| ANL A,Rn | 1 | 1 | AND register to Accumulator | ||
| ANL A,direct | 2 | 1 | AND direct byte to accumulator | ||
| ANL A,@Ri | 1 | 1 | AND indirect RAM to accumulator | ||
| ANL A,#data | 2 | 1 | AND immediate data to accumulator | ||
| ANL direct,A | 2 | 1 | AND accumulator to direct byte | ||
| ANL direct,#data | 3 | 2 | AND immediate data to direct byte | ||
| ORL A,Rn | 1 | 1 | OR register to accumulator | ||
| XRL A,Rn | 1 | 1 | Exclusive-OR register to accumulator | ||
| CLR A | 1 | 1 | Clear accumulator | ||
| CPL A | 1 | 1 | Complement accumulator | ||
| RL A | 1 | 1 | Rotate accumulator left | ||
| RLC A | 1 | 1 | Rotate accumulator left through the carry | ||
| RR A | 1 | 1 | Rotate accumulator right | ||
| RRC A | 1 | 1 | Rotate accumulator right through the carry | ||
| SWAP A | 1 | 1 | Swap nibbles within the accumulator |
Data Transfer Instructions
| Instruction | Opcode | Operand | Size (Bytes) | Machine Cycles | Description |
|---|---|---|---|---|---|
| MOV A,Rn | 1 | 1 | Move register to accumulator | ||
| MOV A,direct | 2 | 1 | Move direct byte to accumulator | ||
| MOV A,#data | 2 | 1 | Move immediate data to accumulator | ||
| MOVC A,@A+DPTR | 1 | 2 | Move code byte relative to DPTR to Acc | ||
| MOVX A,@Ri | 1 | 2 | Move external RAM (8-bit address) to Acc. | ||
| PUSH direct | 2 | 2 | Push direct byte onto stack | ||
| POP direct | 2 | 2 | POP direct byte from stack | ||
| XCH A,Rn | 1 | 1 | Exchange register with accumulator | ||
| XCH A,direct | 2 | 1 | Exchange direct byte with accumulator | ||
| XCH A,@Ri | 1 | 1 | Exchange indirect RAM with accumulator | ||
| XCHD A,@Ri | 1 | 1 | Exchange low order digit of indirect RAM with ACC |
Boolean Instructions
| Instruction | Opcode | Operand | Size (Bytes) | Machine Cycles | Description |
|---|---|---|---|---|---|
| CLR C | 1 | 1 | Clear Carry | ||
| CLR bit | 2 | 1 | Clear direct bit | ||
| SETB C | 1 | 1 | Set carry | ||
| SETB bit | 2 | 1 | Set direct bit | ||
| CPL C | 1 | 1 | Complement carry | ||
| CPL bit | 2 | 1 | Complement direct bit | ||
| ANL C,bit | 2 | 2 | AND direct bit to carry | ||
| ANL C,/bit | 2 | 2 | AND complement of direct bit to carry | ||
| ORL C,bit | 2 | 2 | OR direct bit to carry | ||
| MOV C,bit | 2 | 1 | Move direct bit to carry | ||
| MOV bit,C | 2 | 2 | Move carry to direct bit | ||
| JC rel | 2 | 2 | Jump if carry is set | ||
| JNC rel | 2 | 2 | Jump if carry is not set | ||
| JB bit,rel | 3 | 2 | Jump if direct bit is set | ||
| JNB bit,rel | 3 | 2 | Jump if direct bit is not set | ||
| JBC bit,rel | 3 | 2 | Jump if direct bit is set and clear bit |
Branching Instructions
| Instruction | Opcode | Operand | Size (Bytes) | Machine Cycles | Description |
|---|---|---|---|---|---|
| ACALL addr11 | 2 | 2 | Absolute subroutine call | ||
| LCALL addr16 | 3 | 2 | Long subrouting call | ||
| RET | 1 | 2 | Return from subroutine | ||
| RETI | 1 | 2 | Return from interrupt | ||
| AJMP addr11 | 2 | 2 | Absolute Jump | ||
| LJMP addr16 | 3 | 2 | Long Jump | ||
| JMP @A+DPTR | 1 | 2 | Jump indirect relative to the DPTR | ||
| JZ rel | 2 | 2 | Jump if accumulator is zero | ||
| JNZ rel | 2 | 2 | Jump if accumulator is non-zero | ||
| CJNE A,direct,rel | 3 | 2 | Compare direct byte to acc and jump if not equal | ||
| DJNZ Rn,rel | 2 | 2 | Decrement register and jump if not zero | ||
| DJNZ direct,rel | 3 | 2 | Decrement direct byte and jump if not zero | ||
| NOP | 1 | 1 | No Operation (12 oscillator periods implied, but listed as 1 cycle) |
