16QAM Modulation VHDL Source Code

vhdl
modulation
source code
16qam
communication system

This page provides the VHDL source code for 16QAM modulation and includes a link to the QAM modulation basics.

VHDL Code

-- library declaration
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- entity declaration
entity qam_new_n is
    Port (
        clk       : in  std_logic;                     -- global clock
        reset     : in  std_logic;                     -- asynchronous active high reset
        valid_in  : in  std_logic;                     -- when high din is valid
        din       : in  std_logic_vector(3 downto 0);  -- data in
        dout_rl   : out std_logic_vector(15 downto 0); -- real out
        dout_ig   : out std_logic_vector(15 downto 0); -- imag out
        valid_out : out std_logic                      -- when high real and imag is valid
    );
end qam_new_n;

-- architecture declaration
architecture Behavioral of qam_new_n is
    signal count     : std_logic;
    signal dout_rl_s : std_logic_vector(15 downto 0);
    signal dout_ig_s : std_logic_vector(15 downto 0);
begin
    -- process to map 16 point constellation
    process(clk, reset)
    begin
        if(reset = '1') then
            dout_rl_s <= (others => '0');
            dout_ig_s <= (others => '0');
            count     <= '0';
            valid_out <= '0';
        elsif(clk'event and clk = '1') then
            if(valid_in = '1') then
                count         <= '0';
                case din is
                    when"0000" =>
                        dout_rl_s <= x"143d";       --x"0051";
                        dout_ig_s   <= x"143d";       --x"0051";
                        valid_out   <= '1';
                    when"0001" =>
                        dout_rl_s <= x"143d";       --x"0051";
                        dout_ig_s   <= x"3CB7";       --x"00F2";
                        valid_out   <= '1';
                    when"0010" =>
                        dout_rl_s <= x"143d";       --x"0051";
                        dout_ig_s   <= x"EBC3";       --x"FFAE";
                        valid_out   <= '1';
                    when"0011" =>
                        dout_rl_s <= x"143d";       --x"0051";
                        dout_ig_s   <= x"C349";       --x"FF0D";
                        valid_out   <= '1';
                    when"0100" =>
                        dout_rl_s <= x"3CB7";       --x"00F2";
                        dout_ig_s   <= x"143d";       --x"0051";
                        valid_out   <= '1';
                    when"0101" =>
                        dout_rl_s <= x"3CB7";       --x"00F2";
                        dout_ig_s   <= x"3CB7";       --x"00F2";
                        valid_out   <= '1';
                    when"0110" =>
                        dout_rl_s <= x"3CB7";       --x"00F2";
                        dout_ig_s   <= x"EBC3";       --x"FFAE";
                        valid_out   <= '1';
                    when"0111" =>
                        dout_rl_s <= x"3CB7";       --x"00F2";
                        dout_ig_s   <= x"C349";       --x"FFC3";
                        valid_out   <= '1';
                    when"1000" =>
                        dout_rl_s <= x"EBC3";
                        dout_ig_s   <= x"143d";       --x"0051";
                        valid_out   <= '1';
                    when"1001" =>
                        dout_rl_s <= x"EBC3";       --x"FFAE";
                        dout_ig_s   <= x"3CB7";       --x"00F2";
                        valid_out   <= '1';
                    when"1010" =>
                        dout_rl_s <= x"EBC3";       --x"FFAE";
                        dout_ig_s   <= x"EBC3";       --x"FFAE";
                        valid_out   <= '1';
                    when"1011" =>
                        dout_rl_s <= x"EBC3";       --x"FFAE";
                        dout_ig_s   <= x"C349";       --x"FF0E";
                        valid_out   <= '1';
                    when"1100" =>
                        dout_rl_s <= x"C349";       --x"FF0E";
                        dout_ig_s   <= x"143d";       --x"0051";
                        valid_out   <= '1';
                    when"1101" =>
                        dout_rl_s <= x"C349";       --x"FF0E";
                        dout_ig_s   <= x"3CB7";       --x"00F2";
                        valid_out   <= '1';
                    when"1110" =>
                        dout_rl_s <= x"C349";       --x"FF0E";
                        dout_ig_s   <= x"EBC3";       --x"FFAE";
                        valid_out   <= '1';
                    when"1111" =>
                        dout_rl_s <= x"C349";       --x"FF0E";
                        dout_ig_s   <= x"C349";       --x"FF0E";
                        valid_out   <= '1';
                    when others =>
                        null;
                end case;
            else
                dout_rl_s     <= (others => '0');
                dout_ig_s     <= (others => '0');
                valid_out     <= valid_in;
            end if;
        end if;
    end process;

    dout_rl <= dout_rl_s;
    dout_ig <= dout_ig_s;

end Behavioral;

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vhdl
modulation
bpsk
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