Interfacing PHY and MAC Layers in Wireless Communication Systems

Nowadays, wireless devices are rapidly developing according to IEEE and 3GPP standards. Standards like WLAN, WiMAX, and Zigbee are based on IEEE publications, while GSM, LTE, and UMTS are based on the 3GPP series of standards. As these standards define PHY and MAC layer specifications separately, products based on them must incorporate both functionalities. This often requires software developers to understand how to interface the PHY and MAC layers.

This article covers the physical layer and MAC layer interfacing, providing a useful guide for connecting the physical layer (Layer-1) and the MAC layer (Layer-2) as required in WLAN, WiMAX, LTE, and more.

Fig-1: PHY, MAC, and RF interface diagram

Figure 1 illustrates the PHY, MAC, and RF interface diagram. As shown, a XILINK FPGA is used to implement the PHY layer, while a processor handles the MAC layer. This configuration is suitable for implementing PHY and MAC layer stacks according to WLAN and WiMAX standards. SDRAM serves as shared memory between the PHY and MAC layers.

A direct conversion and zero IF RF transceiver from MAXIM interfaces with the baseband (i.e., PHY) running on the FPGA through ADC/DAC converters. MAXIM manufactures the MAX2837 and MAX2839 RF Transceiver devices, which operate in the 2.3 to 2.7 GHz frequency range. MAXIM offers these devices in the form of evaluation kits. The MAX2839 device is an ideal choice for MIMO testing. MIMO (Multiple Input Multiple Output) is a widely adopted multiple antenna technique used to increase data rates in various standards such as WLAN-11ac/WLAN-11ad, as well as LTE/LTE-Advanced.

These RF evaluation kits are ideal for interfacing the baseband portion due to the availability of I and Q baseband ports. Note that baseband refers to the PHY or Physical layer (Layer-1). Various RF evaluation boards are available at different frequency ranges, selected based on different standards such as WLAN, WIMAX, GSM, CDMA, LTE, etc., and their frequencies of operation.

About PHY and MAC Interfacing Technique

As shown in Figure 1, the PHY layer is implemented on the FPGA, and the MAC engine is implemented on a PXA270 processor. The typical functions handled by the PHY and MAC layers are explained below:

MAC Layer

• Interfaces to the OS through a driver.
• Provides API functions for higher-layer applications to call.

The interface between the PHY and MAC layer handles two types of data transmission:

1. Control Interface: Uses an interrupt-based special messaging system using mailboxes.
2. Data Traffic: Uses transmit and receive circular data buffers with input and output pointers and interrupt messages for transferring traffic data between the PHY and MAC layers.