RFPCIe 5.0 vs PCIe 6.0: Key Differences Explained
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This article compares PCIe 5.0 and PCIe 6.0, highlighting the key differences between them.
Introduction:
- PCIe stands for PCI Express and is the successor to the PCI and PCI-X bus.
- Unlike PCI, which uses a parallel connection, PCIe utilizes a serial connection.
- The evolution of PCI express includes PCIe 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, and 7.0 (planned for 2025).
- Let’s compare PCIe 5.0 and 6.0 in terms of line code, transfer rate, and bandwidth.
The PCIe interface supports hot-plugging and uses a point-to-point or shared switch topology. The figure above illustrates the serial interface connection used by PCIe devices to communicate with the switch.
PCIe 5.0 | PCIe Gen 5 Interface
The following are the features of the PCIe 5.0 (or PCIe Gen 5) interface:
- Introduced in 2019.
- Backward compatible with previous PCIe Gen 1/2/3/4 versions.
- Uses 128b/130b line code.
- Supports a transfer rate of 32.0 GT/s.
- Supports interconnect bandwidth of 32 Gb/s.
- Supports bandwidth lane direction of ~4 GB/s.
- Supports a total bandwidth for an x16 link of ~128 GB/s.
PCIe 6.0 | PCIe Gen 6 Interface
The following are the features of the PCIe 6.0 (or PCIe Gen 6) interface:
- Introduced in 2021.
- Backward compatible with previous PCIe generations.
- Uses flow control units with fixed size (Flits). This allows for lightweight FEC with PAM-4 (four-level pulse amplitude modulation) and a strong CRC with no impact on latency, instead of NRZ modulation (which uses two levels of signaling).
- FEC increases data integrity, and two bits are transferred per transfer due to PAM-4.
- Supports a transfer rate of 64.0 GT/s, which is about 128 GB/s in each direction in a 16-lane configuration.
- Supports a total bandwidth for an x16 configuration link of ~256 GB/s. Note that due to FEC, the net bandwidth isn’t exactly doubled compared to the PCIe 5.0 version.
Difference between PCIe 5.0 and PCIe 6.0
The following table outlines the key differences between PCIe 5.0 and PCIe 6.0:
| Specifications | PCIe 5.0 | PCIe 6.0 |
|---|---|---|
| Data Transfer Rate | 32 GT/s per lane | 64 GT/s per lane |
| Aggregate Bandwidth(x16) | 128 GB/s | 256 GB/s |
| Additional features | Improved Equalization, and advanced error correction | PAM4 (Pulse Amplitude Modulation with 4 levels), Forward Error Correction (FEC) improvements, lane margining, and jitter specifications |
| Applications | Advanced computing, AI, machine learning, high-speed networking | Data centers, high-performance computing (HPC), AI/ML, IoT, advanced storage solutions |
| Power efficiency | Good | Better than PCI 5.0 version |
| Release year | 2019 | 2021 |
Conclusion
PCIe 5.0 and PCIe 6.0 represent successive generations of the PCI Express interface standard, designed to boost data transfer rates and overall performance in computer systems. Both generations maintain backward compatibility with earlier PCIe versions and incorporate improvements in efficiency, signal integrity, and error correction.
PCIe 5.0 and 6.0 cater to the growing demands of high-performance computing, artificial intelligence, and advanced storage solutions. PCIe 6.0 is particularly well-positioned to meet the evolving requirements of modern computing environments.
