LDO Regulator Basics: Low Dropout Voltage Regulators Explained

This page covers the basics of linear regulators, focusing on standard and low dropout voltage regulators (LDOs). We’ll explore the LDO regulator block diagram and define key terminologies.

What is a Low Dropout Regulator?

An LDO is a DC voltage regulator that maintains a regulated output voltage even when the input supply voltage is very close to the desired output voltage.

Linear regulators come in two main types: standard linear regulators and low dropout regulators (LDOs). The primary difference lies in the pass element used and the resulting dropout voltage. The output voltage of a regulator is essentially the input voltage minus the voltage drop across the pass element.

LDO Pass Elements

Figure 1 illustrates common LDO regulator pass elements. Standard regulators typically use either a Darlington NPN or PNP stage as the pass element. This configuration leads to a higher voltage drop, typically around 2V, due to the two base-to-emitter voltage drops inherent in the Darlington configuration.

Most LDO regulators utilize either an N-channel or P-channel FET as the pass element. These FETs offer very low dropout voltages, often less than 100mV.

A typical application for LDO regulators is generating 3.3V from a 3.6V Li-Ion battery. This scenario demands a very low dropout voltage. As shown in the figure, the dropout voltage is directly related to the minimum voltage drop across the FET, which is a function of the FET’s R_DS(ON) (drain-source on-resistance).

LDO Regulator Block Diagram

Figure 2 depicts a simplified LDO regulator block diagram.

The input voltage is applied to the pass element. This pass element operates in its linear region, dropping the input voltage down to the desired output voltage level.

The resulting output voltage is sensed by an error amplifier, which compares it to a reference voltage. The error amplifier then drives the gate of the pass element to the appropriate operating point, ensuring the correct output voltage is maintained.

In essence, the error amplifier modulates the pass element to keep the output voltage constant, even when the operating current or input voltage fluctuates. Under steady-state conditions, the LDO regulator behaves like a simple resistor.

LDO Regulator Terms

Here are some important terms associated with LDO regulators:

• Dropout Voltage: The minimum voltage difference required across the regulator (between input and output) to maintain a regulated output voltage. For example, if an LDO regulator has a 3.3V regulated output and a 1V dropout voltage, the input voltage must be at least 4.3V to maintain regulation. It’s the input-to-output differential voltage at which the circuit stops regulating against further input voltage reductions. This occurs when the input voltage approaches the output voltage. It can be expressed in terms of ON-resistance as follows:

  Vdropout = Io * RON
  

  Where Io is the output current.

• Quiescent Current: The difference between the input current and the output current.

  Iq = Ii - Io
  

  A low quiescent current is desirable to maximize the current efficiency of the LDO regulator. It includes the bias current and the gate drive current of the series pass element.

• Standby Current: The input current drawn by the LDO regulator when the output voltage is disabled via a shutdown signal.

• Efficiency: The LDO regulator efficiency is expressed as:

  Efficiency = (Io * Vo) / ((Io + Iq) * Vi) * 100
  

  To achieve higher efficiency, the dropout voltage and quiescent current should be minimized. Furthermore, the voltage difference between the input and output should also be minimized.